The present invention relates to semiconductor processing and, in particular, to a process for forming a bipolar junction transistor emitter structure in BICMOS (Bipolar junction and Complementary Metal Oxide Silicon) integrated circuits.
Although the original development of the monolithic integrated circuit ("IC") was based upon bipolar junction transistor ("BJT") technology, much of the recent work has focussed on very large scale integrated ("VLSI") circuits that utilize metal-oxide-silicon field effect ("MOSFET") transistors. MOSFET devices may be constructed with n-channel transistors ("NMOS"), p-channel transistors ("PMOS") or may combine both n-channel and p-channel transistors in a complementary design ("CMOS").
The MOSFET devices, with their generally lower power dissipation and greater circuit densities, have come to dominate the logic and memory portions of the semiconductor market. Bipolar devices, however, have continued to be preferred in certain applications that require linear amplification of analog signals or maximum high frequency performance.
As can be appreciated, the limitations inherent in restricting a product to either MOSFET or BJT technologies at times forced circuit and device designers to compromise device or system performance. Thus, for some applications, the design requirements could best be met by combining both CMOS and BJT technologies in the same monolithic structure ("BiCMOS").
The need for a combination of both CMOS and BJT technologies has led to the development of a series of hybrid process flows that can produce the desired monolithic structure. However, in order to encompass production of the various elements of both CMOS and BJT structures, the first processes were more complex and demanding and frequently achieved lower circuit densities than either technology singly. Subsequent efforts in the BiCMOS process field have sought to reduce the complexity and/or improve the performance of first processes through elimination of masking levels, utilization of common elements, and other processing modifications.
It is known that the use of polysilicon emitter structures can improve device performance by reducing base saturation currents, j.sub.Dsat, and increasing the device gain, h.sub.fe. As device sizing decreases however, encroachment from the extrinsic base regions limit the effective area available for collector current injection. Extrinsic base region encroachment can offset the benefits associated with polysilicon emitters by reducing the current gain, lowering the cutoff frequency, and degrading device reliability.
An objective of the present invention is the production of an improved bipolar junction structure by effecting, through the disclosed method, an increased physical separation of the oppositely doped regions present in the structure without requiring a corresponding increase in the device surface area.
A further object of the present invention is the use of the improved bipolar junction structure as an emitter structure in the production of an improved bipolar junction transistor exhibiting desirable electrical parameters yet being less sensitive to process variation than existing devices.
A further object of the present invention is the production of an improved bipolar junction transistor which is especially resistant the degradation in electrical performance associated with dopant encroachment into the base region.
A further object of the present invention is the production of an improved bipolar junction transistor emitter structure in which a portion of the base adjacent to the emitter is removed after the deposition of the emitter polysilicon to form a "pillar" structure that reduces sensitivity to process variations.
A further object of the present invention is the use of the improved bipolar junction transistor in the production of an improved BICMOS device through integration of BJT and CMOS processes, thereby allowing the benefits of the combination of BJT and CMOS structures in a single monolithic structure as well as the BJT performance improvements provided by the present invention.